Integrated circuit systems often include integrated circuits (ICs) that are attached to other ICs, interposer boards, or printed circuit boards in a stacked relationship. The IC system can include, for example, microprocessor circuits, memory circuits, analog circuits, and the like that are interconnected to take advantage of the unique attributes of the individual circuits. By vertically stacking the system components the size or footprint of the system can be minimized. Interconnection between the system components can be realized, in part, by through substrate vias (TSVs). Providing TSVs requires thinning the semiconductor substrate in and on which the IC is fabricated. Thinning a large semiconductor wafer (typically 300 millimeters in diameter) to a thickness of 30-100 microns (μm) is a challenging process that can seriously impact the yield of the integrated circuit system.
Accordingly, it is desirable to provide high yielding methods for fabricating integrated circuit systems. In addition, it is desirable to provide methods for fabricating integrated circuit systems that avoid the yield impacting difficulties of thinning the integrated circuit semiconductor substrates. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background.